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BU6566GVW_09 Datasheet, PDF (13/17 Pages) Rohm – Camera Image Processors Compatible with JPEG Image
BU6566GVW, BU6568GV
Technical Note
4. LCD transfer timing
Transfer timing to LCD is shown below.
RESO Nwrb
Npix
Tseq
Th_rest
0
2
1
(WL+WH+2)×2
0
1
2
1
(WL+WH+2)×2
0
2
3
2
(WL+WH+max(WL,WH)+3)×2
abs(WL-WH)
3
1
1
(WL+WH+2)
0
4
2
1
(WL+WH+2)×2
0
5
3
1
(WL+WH+2)×3
0
6
3
1
(WL+WH+2)×3
0
7
2
1
(WL+WH+2)×2
0
*RESO(IDX:42h bit [2:0]) shows a color resolution setting of LCD.
*Nwrb, Npix, Tseq, and Th_rest are the parameters determined by RESO.
*WL, WH are the value of LCDWL, LCDWH of Register MLCDWAV (IDX:49h), respectively.
*max (WL, WH) shows the maximum of WL and WH.
*abs(WL-WH) shows the absolute value of (WL-WH).
TRN_CMD=1
Waveform at command transfer (TSCLK for all unit)
EXCMD=0
LCDCSB
EXCMD=1~7
4
Command
LCDCSB
2
WH+2
WH+3
LCDWRB
LCDA0
WL+1
12
WH+3
LCDD0-15
12
WH+2 1
TRN_CMD=0
Waveform at data transfer (TSCLK for all unit)
Nwrb=1
Tseq
Nwrb=2
LCDWRB
WH+1+Th_rest
LCDWRB
WL+1
Nwrb=3
Tseq
Tseq
WH+1
WH+1+Th_rest
WL+1
WL+1
LCDWRB
WH+1
WL+1
WH+1
WH+1+Th_rest
WL+1
WL+1
EXCMD=0
Data
LCDCSB
LCDWRB
LCDA0
LCDD0-15
EXCMD=1-7
(Tseq/Npix)+5
WH+1
WL+1
1 (Tseq/Npix)+5
1 (Tseq/Npix)+5
Command
WH+2+Th_rest
WH+2+Th_rest
WH+1+Th_rest 1
Data
LCDCSB
LCDWRB
LCDA0
LCDD0-15
2
WH+2
WH+1
12
12
(Tseq/Npix)+WH+5
WH+1
1 WL+1
(Tseq/Npix)+WH+4
(Tseq/Npix)+WH+5
WH+2+Th_rest
WH+2+Th_rest
WH+1+Th_rest 1
(Note1)In LCD_DELAY[1:0]( IDX:49h bit [9:8]) ="00", LCDA0 and LCDD change in LCDWRB falling, and are held to the next LCDWRB falling.
(Note2)Change of LCDWRB is late for LCDA0 and LCDD 15-0 according to a setup of LCD_DELAY [1:0] (at the time of output no-load).
Typ. delays 10ns in LCD_DELAY[1:0] ="01." 1tSCLK in LCD_DELAY[1:0] ="10”. 1tSCLK+Typ.10ns in LCD_DELAY[1:0] ="11”.
Figure 4-1 MAIN LCD data transfer waveform(Unit:tSCLK)
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2009.04 - Rev.B