BU9833GUL-W Datasheet, PDF (10/13 Pages) Rohm – Silicon Monolithic Integrated Circuit

SDA
LINE
WP
S
W
T
R
A
R
T
SLAVE
ADDRESS
I
T
E
WA
1 0 1 0 A2 0 0
7
RA
/C
WK
WORD
ADDRESS
WA
0 ^D7
A
C
K
DATA
S
T
O
P
D0
A
C
K
10/12
Fig.-8 BYTE WRITE CYCLE TIMING
○By using this command, the data is programed into the indicated word address.
○When the master generates a STOP condition, the device begins the internal
write cycle to the nonvolatile memory array.
◇ PAGE WRITE
S
W
T
R
A
R
T
SLAVE
ADDRESS
I
T
E
WORD
ADDRESS（ｎ）
DATA(n)
SDA
LINE
WA
1 0 1 0 A2 0 0
7
WA
0
D7
D0
RA
A
A
/C
C
C
WK
K
K
WP
S
T
DATA(n+7)
O
P
D0
A
C
K
Fig.-9 PAGE WRITE CYCLE TIMING
○ This device is capable of eight byte Page Write operation.
○ When two or more byte data are inputted, the three low order address bits are internally
incremented by one after the receipt of each word. The five higher order bits of the
address(WA7～WA3) remain constant.
○If the master transmits more than eight words, prior to generating the STOP condition,
the address counter will “roll over,” and the previous transmitted data will be overwritten.
REV. A