DS1650 Datasheet, PDF (5/26 Pages) National Semiconductor (TI) – Quad Differential Line Receivers

Function Block Diagram
CLMP1 CLMP2
VDD1 VDD2
RT1650
RECT
ADD
AC1
AC2
PGND
BOOT1
BOOT2
COM1
COM2
CHG
OVP
Synchronous
Rectifier Control
Regulator
OTP
UVLO
Clock
Generator
9MHz
FSK
DeCoder
Packet
Control
ROM / OTP
32KB
ROM 4KB
(boot loader)
MTP
272B
Digital
Control
MCU
32-bit
ADC
10-bit
40kHz
Register
Bank
SRAM
1KB
Mode
Control
GPIO
Adapter
Detection
V_OUT
I_OUT
V_RECT
V_TS
I2C
Slave
-
+
V_REF
ADEN
OUT
GND
TS
SCL
SDA
MODE0
MODE1
GPIO
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DS1650-00 July 2015
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