English
Language : 

M16C64A_15 Datasheet, PDF (90/92 Pages) Renesas Technology Corp – RENESAS MCU
REVISION HISTORY
M16C/64A Group Datasheet
Rev.
2.00
Date
Feb 07, 2011
Description
Page
Summary
Address Space
18 Figure 3.2 Memory Map:
• Added the address of 384 KB version.
• Added note 1 and 3 to the reserved areas.
Special Function Registers (SFRs)
20
Table 4.1 SFR Information (1) (1):
• Deleted “the VCR1 register, the VCR2 register” from note 2.
• Deleted notes 5 to 6 and added note 5.
21
Table 4.2 SFR Information (2) (1): Deleted notes 2 to 7 and added note 2.
38 4.2.1 Register Settings: Added the description regarding read-modify-write instructions.
39 Table 4.20 Read-Modify-Write Instructions: Added.
Electrical Characteristics
40 Table 5.1 Absolute Maximum Ratings:
Added a row for the data area value to Topr (Flash program erase).
41 Table 5.2 Recommended Operating Conditions (1/3):
Added rows for the CEC value to VCC1, VCC2, VIH, and VIL.
45 Table 5.9 Flash Memory (Program ROM 1, 2) Electrical Characteristics:
Added a condition to the Read voltage row.
48 Table 5.14 Power-On Reset Circuit:
• Added the tw(por) row.
• Added the last line in note 1.
48 Figure 5.3 Power-On Reset Circuit Electrical Characteristics: Deleted note 2.
52
Table 5.18 Electrical Characteristics (2) (1): Added “ZP, IDU, IDV, IDW” to the VT+-VT- row.
54 Table 5.20 Electrical Characteristics (4): Added new part numbers above the table.
60, 78 Table 5.33 and Table 5.53 Multi-master I2C-bus: Added.
61 Table 5.34 Memory Expansion Mode and Microprocessor Mode:
Changed RDY input setup time from 30.
61 to 68,
79 to 86
Table 5.34 to Table 5.37 and Table 5.54 to Table 5.57 Memory Expansion Mode and
Microprocessor Mode:
Deleted the following:
• HOLD input setup time
• HOLD input hold time
• HLDA output delay time
62, 80 Figure 5.13 and Figure 5.26 Timing Diagram:
Deleted lower figure (Common to wait state and no wait state settings).
70
Table 5.38 Electrical Characteristics (1) (1):
• Added rows for the CEC value to Leakage current in powered-off state, VT+-VT-, and
VOL.
• Added “ZP, IDU, IDV, IDW” to the VT+-VT- row.
71 Table 5.39 Electrical Characteristics (2): Changed “VCC1 = 5.0 V” to "VCC1 = 3.0 V" in the
During flash memory program and During flash memory erase rows.
72 Table 5.40 Electrical Characteristics (3):
• Added new part numbers above the table.
• Changed “VCC1 = 5.0 V” to "VCC1 = 3.0 V" in the During flash memory program and
During flash memory erase rows.
79 Table 5.54 Memory Expansion Mode and Microprocessor Mode:
Changed RDY input setup time from 40.
All trademarks and registered trademarks are the property of their respective owners.
IEBus is a registered trademark of NEC Electronics Corporation.
HDMI and High-Definition Multimedia Interface are registered trademarks of HDMI Licensing, LLC.
A-2