H8SX1657 Datasheet, PDF (786/892 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 20 Power-Down Modes
• MSTPCRA
Initial
Bit
Bit Name Value R/W Module
15
ACSE
0
R/W All-Module-Clock-Stop Mode Enable
Enables/disables all-module-clock-stop mode for
reducing current consumption by stopping the bus
controller and I/O ports operations when the CPU
executes the SLEEP instruction after module stop state
has been set for all the on-chip peripheral modules
controlled by MSTPCR.
0: All-module-clock-stop mode disabled
1: All-module-clock-stop mode enabled
14
MSTPA14 0
R/W Reserved
13
MSTPA13 0
R/W These bits are always read as 0. The write value should
always be 0.
12
MSTPA12 0
R/W Data transfer controller (DTC)
11
MSTPA11 1
R/W Reserved
10
MSTPA10 1
R/W These bits are always read as 1. The write value should
always be 1.
9
MSTPA9 1
R/W 8-bit timer (TMR_3 and TMR_2)
8
MSTPA8 1
R/W 8-bit timer (TMR_1 and TMR_0)
7
MSTPA7 1
R/W Reserved
6
MSTPA6 1
R/W These bits are always read as 1. The write value should
always be 1.
5
MSTPA5 1
R/W D/A converter (channels 1 and 0)
4
MSTPA4 1
R/W Reserved
This bit is always read as 1. The write value should
always be 1.
3
MSTPA3 1
R/W A/D converter (unit 0)
2
MSTPA2 1
R/W Reserved
1
MSTPA1 1
R/W These bits are always read as 1. The write value should
always be 1.
0
MSTPA0 1
R/W 16-bit timer pulse unit (TPU channels 5 to 0)
Rev. 2.00 Jun. 28, 2007 Page 762 of 864
REJ09B0341-0200