H8SX1657 Datasheet, PDF (597/892 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 14 Serial Communication Interface (SCI)
14.3.8 Smart Card Mode Register (SCMR)
SCMR selects smart card interface mode and its format.
Bit
7
6
5
4
3
2
1
0
Bit Name




SDIR
SINV

SMIF
Initial Value
1
1
1
1
0
0
1
0
R/W
R
R
R
R
R/W
R/W
R
R/W
Bit
7 to 4
Bit Name

Initial
Value
All 1
3
SDIR
0
2
SINV
0
1

1
0
SMIF
0
R/W
R
R/W
R/W
R
R/W
Description
Reserved
These are read-only bits and cannot be modified.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: Transfer with LSB-first
1: Transfer with MSB-first
This bit is valid only when the 8-bit data format is used for
transmission/reception; when the 7-bit data format is
used, data is always transmitted/received with LSB-first.
Smart Card Data Invert
Inverts the transmit/receive data logic level. This bit does
not affect the logic level of the parity bit. To invert the
parity bit, invert the O/E bit in SMR.
0: TDR contents are transmitted as they are. Receive
data is stored as it is in RDR.
1: TDR contents are inverted before being transmitted.
Receive data is stored in inverted form in RDR.
Reserved
This is a read-only bit and cannot be modified.
Smart Card Interface Mode Select
When this bit is set to 1, smart card interface mode is
selected.
0: Normal asynchronous or clocked synchronous mode
1: Smart card interface mode
Rev. 2.00 Jun. 28, 2007 Page 573 of 864
REJ09B0341-0200