H8S2472 Datasheet, PDF (786/1250 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series

Section 19 LPC Interface (LPC)
19.4.4 BT Mode Transfer Flow
Figure 19.6 shows the write transfer flow and figure 19.7 shows the read transfer flow in BT
mode.
Slave
Host
Slave waits for the H2B_ATN bit (interrupt from
host) is set.
Wait for
B_BUSY = 0
Host confirms the B_BUSY bit in BTCR.
Wait for
H2B_ATN = 0
Host confirms the H2B_ATN bit in BTCR.
Confirms the CLR_WR_PTR bit.
The CRWPI bit in BTSR1 is set to notify write
pointer clearing as an interrupt to slave.
Clear write pointer ^{Host clears write pointer by setting the CLR_WR_PTR}
bit in BTCR.
Generate slave
interrupt
Write BTDTR buffer Host writes data of 1 to n bytes to the BTDTR buffer.
Confirms host write is started.
The HBTWI bit in BTSR0 is set.
Confirms the H2B_ATN bit is set.
The H2BI bit in BTSR1 is set.
Generate slave
interrupt
H2B_ATN = 1
Host sets the H2B_ATN bit in BTCR to indicate data write
completion to the buffer for the BT interface.
Generate slave
interrupt
Slave sets the B_BUSY bit in BTCR.
B_BUSY = 1
Slave reads data from the BTDTR buffer.
Read BTDTR buffer
Slave clears the H2B_ATN bit in BTCR.
H2B_ATN = 0
Slave clears the B_BUSY bit in BTCR to indicate
transfer completion.
B_BUSY = 0
Figure 19.6 BT Write Transfer Flow
Rev. 2.00 Aug. 20, 2008 Page 738 of 1198
REJ09B0403-0200