H8S2472 Datasheet, PDF (252/1250 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series

Section 8 I/O Ports
(4) Noise Canceler Enable Register (P3NCE)
P3NCE enables or disables the noise canceler circuit at port 3.
Bit Bit Name Initial Value R/W Description
7
P37NCE 0
R/W • Normal extended mode (ADMXE = 0)
6
P36NCE 0
5
P35NCE 0
4
P34NCE 0
3
P33NCE 0
2
P32NCE 0
1
P31NCE 0
0
P30NCE 0
R/W
R/W
•
R/W
R/W
R/W
R/W
R/W
The pins function as bidirectional data bus pins. Set
this register to 0.
Other modes
Enables the noise canceler circuit for the
corresponding pin and the pin state is fetched into
P3DR at the sampling cycle set by NCCS.
The operation changes according to the other
control bits.
(5) Noise Canceler Mode Control Register (P3NCMC)
When the noise canceler is enabled, P3NCMC controls whether 1 or 0 is expected for the input
signal to port 3 in bit units.
Bit Bit Name Initial Value R/W Description
7
P37NCMC 1
6
P36NCMC 1
5
P35NCMC 1
4
P34NCMC 1
3
P33NCMC 1
2
P32NCMC 1
1
P31NCMC 1
R/W •
R/W
R/W ^•
R/W
R/W
R/W
R/W
Normal extended mode (ADMXE = 0)
This register has no effect on operation.
Other modes
1 expected: 1 is stored in the port data register
while 1 is input stably.
0 expected: 0 is stored in the port data register
while 0 is input stably.
0
P30NCMC 1
R/W
Rev. 2.00 Aug. 20, 2008 Page 204 of 1198
REJ09B0403-0200