H8S39 Datasheet, PDF (739/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
17.2.3 A/D Control Register (ADCR)
Bit
:
7
6
5
TRGS1 TRGS0 ⎯
Initial value :
0
0
1
R/W
: R/W
R/W
⎯
Section 17 A/D Converter
4
3
2
1
0
⎯
CKS1 CKS0
⎯
⎯
1
0
0
1
1
⎯
R/W R/W
⎯
⎯
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion operations and sets the A/D conversion time.
ADCR is initialized to H'33 by a reset, and in standby mode or module stop mode.
Bits 7 and 6—Timer Trigger Select 1 and 0 (TRGS1, TRGS0): Select enabling or disabling of
the start of A/D conversion by a trigger signal. Only set bits TRGS1 and TRGS0 while conversion
is stopped (ADST = 0).
Bit 7
TRGS1
0
1
Bit 6
TRGS0
0
1
0
1
Description
A/D conversion start by software is enabled
(Initial value)
A/D conversion start by TPU conversion start trigger is enabled
Setting prohibited
A/D conversion start by external trigger pin (ADTRG) is enabled
Bits 5, 4, 1, and 0—Reserved: These bits are reserved; they are always read as 1 and cannot be
modified.
Bits 3 and 2—Clock Select 1 and 0 (CKS1, CKS0): These bits select the A/D conversion time.
The conversion time should be changed only when ADST = 0.
Set bits CKS1 and CKS0 to give a conversion time of at least 10 µs.
Bit 3
CKS1
0
1
Bit 2
CKS0
0
1
0
1
Description
Conversion time = 530 states (max.)
Conversion time = 266 states (max.)
Conversion time = 134 states (max.)
Conversion time = 68 states (max.)
(Initial value)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 689 of 1458