H8S2114R Datasheet, PDF (732/1038 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 18 LPC Interface (LPC)
Table 18.5 shows the scope of the LPC interface pin shutdown.
Table 18.5 Scope of LPC Interface Pin Shutdown
Abbreviation Port
Scope of
Shutdown I/O
Notes
LAD3 to LAD0 P33 to P30 O
LFRAME
P34
O
I/O
Hi-Z
Input
Hi-Z
LRESET
P35
X
Input
LPC hardware reset function is active
LCLK
P36
O
Input
Hi-Z
SERIRQ
P37
O
I/O
Hi-Z
LSCI
LSMI
PME
PB1
∆
PB0
∆
P80
∆
I/O
Hi-Z, only when LSCIE = 1
I/O
Hi-Z, only when LSMIE = 1
I/O
Hi-Z, only when PMEE = 1
GA20
P81
∆
CLKRUN
P82
O
LPCPD
P83
X
I/O
Input
Input
Hi-Z, only when FGA20E = 1
Hi-Z
Needed to clear shutdown state
[Legend]
O: Pin that is shutdown by the shutdown function
∆:
Pin that is shutdown only when the LPC function is selected by register setting
X:
Pin that is not shutdown
In the LPC shutdown state, the LPC’s internal state and some register bits are initialized. The
order of priority of LPC shutdown and reset states is as follows.
1. System reset (reset by STBY or RES pin input, or WDT0 overflow)
All register bits, including bits LPC4E to LPC1E, are initialized.
2. LPC hardware reset (reset by LRESET pin input)
LRSTB, SDWNE, and SDWNB bits are cleared to 0.
3. LPC software reset (reset by LRSTB)
SDWNE and SDWNB bits are cleared to 0.
4. LPC hardware shutdown
SDWNB bit is cleared to 0.
5. LPC software shutdown
The scope of the initialization in each mode is shown in table 18.6.
Rev. 3.00 Jul. 14, 2005 Page 684 of 986
REJ09B0098-0300