H8S2114R Datasheet, PDF (131/1038 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 5 Interrupt Controller
5.3.1 Interrupt Control Registers A to D (ICRA to ICRD)
The ICR registers set interrupt control levels for interrupts other than NMI. The correspondence
between interrupt sources and ICRA to ICRD settings is shown in tables 5.2 and 5.3.
Bit
7 to 0
Bit Name
ICRn7 to
ICRn0
Initial Value
All 0
Note: n: A to D
R/W Description
R/W Interrupt Control Level
0: Corresponding interrupt source is interrupt
control level 0 (no priority)
1: Corresponding interrupt source is interrupt
control level 1 (priority)
Table 5.2 Correspondence between Interrupt Source and ICR (H8S/2140B Group
Compatible Vector Mode: EIVS = 0)
Register
Bit Bit Name ICRA
ICRB
ICRC
7
ICRn7
IRQ0
A/D converter
—
6
ICRn6
IRQ1
FRT
SCI_1
5
ICRn5
IRQ2, IRQ3
—
SCI_2
4
ICRn4
IRQ4, IRQ5
—
IIC_0
3
ICRn3
IRQ6, IRQ7
TMR_0
IIC_1
2
ICRn2
DTC
TMR_1
—
1
ICRn1
WDT_0
TMR_X, TMR_Y LPC
0
ICRn0
WDT_1
KBU
—
Note: n: A to D
: Reserved. The initial value should not be changed.
ICRD
IRQ8 to IRQ11
IRQ12 to IRQ15
—
WUE8 to WUE15
TPU_0
TPU_1
TPU_2
—
Rev. 3.00 Jul. 14, 2005 Page 83 of 986
REJ09B0098-0300