H8S2646 Datasheet, PDF (712/1165 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 20 ROM
Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory block are program/erase-protected.
Bit 3
RAMS
0
1
Description
Emulation not selected
Program/erase-protection of all flash memory blocks is disabled
Emulation selected
Program/erase-protection of all flash memory blocks is enabled
(Initial value)
Bits 2 to 0—Flash Memory Area Selection (RAM2 to RAM0): These bits are used together
with bit 3 to select the flash memory area to be overlapped with RAM. (See table 20.5.)
Table 20.5 Flash Memory Area Divisions
Addresses
H'FFE000 to H'FFE3FF
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
Block Name
RAM area 1 kbyte
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbyte)
RAMS
0
1
1
1
1
RAM2
*
0
0
1
1
RAM1
*
0
1
0
1
RAM0
*
*
*
*
*
*: Don't care
Rev. 5.00 Sep 22, 2005 page 686 of 1136
REJ09B0257-0500