SH74582_15 Datasheet, PDF (7/14 Pages) Renesas Technology Corp – RENESAS MCU

SH74582
Appendix B.3
Section 11 Address Space
Appendix B
32-bit virtual address space
via CPU
H’A000 0000
H'A00F FFFF
H’A010 0000
H'A3FF FFFF
H’A400 0000
H'A7FF FFFF
H’A800 0000
H'ABFF FFFF
H’AC00 0000
H'AFFF FFFF
H’B000 0000
P2 area
(512 Mbytes)
H'B3FF FFFF
H’B400 0000
H'B7FF FFFF
H’B800 0000
H'B807 FFFF
H’B808 0000
H'BBFF FFFF
H’BC00 0000
H'BFFF FFFF
Area 0
Area 1
29-bit physical address space
Single chip
Internal ROM
(1 Mbyte)
Reserved
Area 2
Area 3
Reserved
Area 4
Area 5
Area 6
Area 7
SHwyRAM
(512Kbytes)
Reserved
Reserved
Note:
The CPU, DMAC, AUDR, and other modules cannot access a reserved area.
Figure 11.4 Address Space (P2 Area)
R01DS0240EJ0111 Rev.1.11
Feb 18, 2015
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