HD49815TF Datasheet, PDF (7/22 Pages) Hitachi Semiconductor – Digital Camera Signal Processor

HD49815TF
Description of I/O Format
I/O Format
Contents
IC
CMOS level input
ICD
CMOS level input with pull-down resistor
ICS
CMOS level schmitt input
ICSD
CMOS level input with pull-down resistor
ICZC2
CMOS level common I/O (4 mA)
ICZC2DR
CMOS level common I/O with pull-down resistor and through-put control (4 mA)
ICZC2R
CMOS level common I/O with through-put control (4 mA)
OC2R
CMOS level output with through-put control (4 mA)
OC3R
CMOS level output with through-put control (8 mA)
IQ2
Crystal oscillator input
OQ2
Crystal oscillator output
IQ3
Crystal oscillator input
OQ3
Crystal oscillator output
ZC2
CMOS-level three-state output (4 mA)
ZC2R
CMOS-level three-state output with through-put control (4 mA)
ZC3
CMOS-level three-state output (8 mA)
ZC3R
CMOS-level three-state output with through-put control (8 mA)
VCCI
Core system power supply: 3 V
VCCO
Puddling system power supply: 3 V
VCCC
Common power supply: 3 V
VCCC5
Common power supply: 5 V for pin 112
VCCC35
Common power supply: 3 or 5 V for pin 109
GNDI
Core system GND
GNDO
Puddling system GND
GNDC
Common GND
IA
Analog input
OA
Analog output
VCCA
Analog power supply
GNDA
Analog GND
Notes: 1. Pin 113 is used for 5 V system output.
2. Pins 110 and 111 are used for 3 V or 5 V system output. They depend on the voltage of pin 109.
Rev.1.00 Jun 15, 2005 page 7 of 21