HD49815TF Datasheet, PDF (12/22 Pages) Hitachi Semiconductor – Digital Camera Signal Processor

HD49815TF
Built-in Functions and System Configuration
System Configuration
Lens CCD HD49323AF-01
CDS/AGC+
10-bit ADC
HD49815TF
Input
line
memory
Color
processing
Luminance
processing
Zoom
processing
C-signal output
Y-signal output
SP1/2
H1, H2
TG
SSG
Micro-
processor
I/F
Encode
DAC
R-Y/B-Y
digital output
Y-signal
digital output
V.Driver
XV1 to 4
AGC gain setting
Initial setting resistor input and
AE, AWB detection data output
System
control
AE
(iris)
control
AWB
(white
balance)
control
8-bit single-chip microcomputer (H8 series)
Figure 2 System Configuration
System Description
1. CCD
The following lists the pixels of the CCD sensors that can be used with the HD49815TF. For other pixel numbers,
contact our sales dept.
512 (H) × 492 (V) NTSC
512 (H) × 582 (V) PAL
682 (H) × 492 (V) NTSC
681 (H) × 582 (V) PAL
2. CDS/AGC + 10-bit ADC
The HD49323AF-01 (manufactured by Renesas) is recommended as an optimal CDS/AGC + 10-bit ADC IC for the
HD49815TF. Since the HD49323AF-01 provides a correlated double sampling circuit that realizes high S/N and an
automatic gain control (AGC) circuit that implements programmable control of 0 dB to 34.7 dB, it enables a high-
image-quality camera system when used in conjunction with the HD49815TF.
3. 8-bit single-chip microcomputer
The 8-bit single-chip microcomputer controls the system. It receives the image detection data that the HD49815TF
is gathering and implements automatic iris control (AE), automatic white balance control (AWB), and automatic
focus control (AF).
When setting the power on, this microcomputer implements the initial setting to the state data of the HD49815TF.
For details on the state data, see “Renesas Camera DSP (HD49815TF) State Data”.
Rev.1.00 Jun 15, 2005 page 12 of 21