M32C84 Datasheet, PDF (67/529 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/84 Group (M32C/84, M32C/84T)
5. Reset
When Stop Mode is not Used
VCC1
Vdet4
Vdet3r
Vdet3
5.0V
Vdet3s
VSS
RESET
Internal Reset Signal
VC13 Bit
Indeterminate
VC26 Bit
Indeterminate
VC27 Bit
Indeterminate
5.0V
Set to "1" by program (reset level detection circuit enabled)
Set to "1" by program
(low voltage detection circuit enabled)
Figure 5.3 Brown-out Detection Reset (Hardware Reset 2)
5.3 Software Reset
Pins, the CPU and SFR are reset when the PM03 bit in the PM0 register is set to "1" (microcomputer reset).
Then the microcomputer executes the program in an address determined by the reset vector.
Set the PM03 bit to "1" while the main clock is selected as the CPU clock and the main clock oscillation is
stable.
In the software reset, the microcomputer does not reset a part of the SFR. Refer to 4. SFR for details.
Processor mode remains unchanged since the PM01 and PM00 bits in the PM0 register are not reset.
5.4 Watchdog Timer Reset
Pins, the CPU and SFR are reset when the CM06 bit in the CM0 register is set to "1" (reset) and the
watchdog timer underflows. Then the microcomputer executes the program in an address determined by
the reset vector.
In the watchdog timer reset, the microcomputer does not reset a part of the SFR. Refer to 4. SFR for details.
Processor mode remains unchanged since the PM01 and PM00 bits in the PM0 register are not reset.
Rev. 1.01 Jul. 07, 2005 Page 46 of 495
REJ09B0036-0101