R8C_08 Datasheet, PDF (66/487 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/26 Group, R8C/27 Group
6. Voltage Detection Circuit
6.3 Voltage Monitor 1 Interrupt and Voltage Monitor 1 Reset (N, D Version)
Table 6.4 lists the Procedure for Setting Bits Associated with Voltage Monitor 1 Interrupt and Reset. Figure 6.14
shows an Example of Voltage Monitor 1 Interrupt and Voltage Monitor 1 Reset Operation (N, D Version). To use
the voltage monitor 1 interrupt or voltage monitor 1 reset to exit stop mode, set the VW1C1 bit in the VW1C
register to 1 (digital filter disabled).
Table 6.4 Procedure for Setting Bits Associated with Voltage Monitor 1 Interrupt and Reset
Step
1
2
3
4⁽²⁾
5⁽²⁾
6
7
8
9
When Using Digital Filter
When Not Using Digital Filter
Voltage Monitor 1 Voltage Monitor 1 Voltage Monitor 1 Voltage Monitor 1
Interrupt
Reset
Interrupt
Reset
Set the VCA26 bit in the VCA2 register to 1 (voltage detection 1 circuit enabled)
Wait for td(E-A)
Select the sampling clock of the digital filter Select the timing of the interrupt and reset
by the VW1F0 to VW1F1 bits in the VW1C request by the VW1C7 bit in the VW1C
register
register⁽¹⁾
Set the VW1C1 bit in the VW1C register to 0 Set the VW1C1 bit in the VW1C register to 1
(digital filter enabled)
(digital filter disabled)
Set the VW1C6 bit in Set the VW1C6 bit in Set the VW1C6 bit in Set the VW1C6 bit in
the VW1C register to the VW1C register to the VW1C register to the VW1C register to
0 (voltage monitor 1 1 (voltage monitor 1 0 (voltage monitor 1 1 (voltage monitor 1
interrupt mode)
reset mode)
interrupt mode)
reset mode)
Set the VW1C2 bit in the VW1C register to 0 (passing of Vdet1 is not detected)
Set the CM14 bit in the CM1 register to 0 −
(low-speed on-chip oscillator on)
Wait for 4 cycles of the sampling clock of the − (No wait time required)
digital filter
Set the VW1C0 bit in the VW1C register to 1 (voltage monitor 1 interrupt/reset enabled)
NOTES:
1. Set the VW1C7 bit to 1 (when VCC reaches Vdet1 or below) for the voltage monitor 1 reset.
2. When the VW1C0 bit is set to 0, steps 3, 4, and 5 can be executed simultaneously (with 1
instruction).
Rev.2.10 Sep 26, 2008 Page 47 of 453
REJ09B0278-0210