R8C_08 Datasheet, PDF (232/487 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/26 Group, R8C/27 Group
14. Timers
Count source
TRC register value
m
n
p
q
m+1
n+1
m-n
TRCIOB output
TRCIOC output
Active level is “H”
“L” initial output until
compare match
TRCIOD output
Active level is “L”
“H” initial output until
IMFA bit in 1
compare match
TRCSR register ₀
IMFB bit in 1
TRCSR register ₀
Inactive level is “L”
p+1
m-p
q+1
m-q
Set to 0 by a program
Set to 0 by a program
IMFC bit in 1
TRCSR register ₀
IMFD bit in 1
TRCSR register ₀
Set to 0 by a program
Set to 0 by a program
m: TRCGRA register setting value
n: TRCGRB register setting value
p: TRCGRC register setting value
q: TRCGRD register setting value
The above applies under the following conditions:
• Bits BFC and BFD in the TRCMR register are set to 0 (registers TRCGRC and TRCGRD do not operate as buffers).
• Bits EB, EC, and ED in the TRCOER register are set to 0 (output from TRCIOB, TRCIOC, and TRCIOD enabled).
• In the TRCCR1 register, bits TOB and TOC are set to 0 (active level is “H”) and the TOD bit is set to 1 (active level is “L”).
Figure 14.53 Operating Example of PWM Mode
Rev.2.10 Sep 26, 2008 Page 213 of 453
REJ09B0278-0210