R8C_08 Datasheet, PDF (231/487 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/26 Group, R8C/27 Group
14. Timers
Timer RC Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
Address
After Reset
TRCCR1
0121h
00h
Bit Symbol
Bit Name
Function
RW
TRCIOA output level select bit⁽¹⁾ Disabled in PWM mode
TOA
RW
TRCIOB output level select bit^{(1, 2)} 0 : Active level “H”
(Initial output “L”
TOB
“H” output by compare match in
RW
the TRCGRj register
TRCIOC output level select bit^{(1, 2)}
“L” output by compare match in
the TRCGRA register
TOC
1 : Active level “L”
RW
(Initial output “H”
TRCIOD output level select bit^{(1, 2)}
“L” output by compare match in
the TRCGRj register
TOD
“H” output by compare match in
RW
the TRCGRA register
Count source select bits⁽¹⁾
b6 b5 b4
TCK0
0 0 0 : f1
RW
0 0 1 : f2
0 1 0 : f4
TCK1
0 1 1 : f8
RW
1 0 0 : f32
1 0 1 : TRCCLK input rising edge
TCK2
1 1 0 : fOCO40M
1 1 1 : Do not set.
RW
CCLR
TRC counter clear select bit
0 : Disable clear (free-running operation)
1 : Clear by compare match in the
RW
TRCGRA register
j = B, C or D
NOTES:
1. Set to these bits w hen the TSTART bit in the TRCMR register is set to 0 (count stops).
2. If the pin function is set for w aveform output (refer to Table 7.15, Table 7.16, Tables 7.26 to 7.29, and Tables
7.37 to 7.40), the initial output level is output w hen the TRCCR1 register is set.
Figure 14.52 TRCCR1 Register in PWM Mode
Table 14.21 Functions of TRCGRj Register in PWM Mode
Register
TRCGRA
TRCGRB
TRCGRC
TRCGRD
TRCGRC
Setting
−
−
BFC = 0
BFD = 0
BFC = 1
TRCGRD BFD = 1
Register Function
General register. Set the PWM period.
General register. Set the PWM output change point.
General register. Set the PWM output change point.
Buffer register. Set the next PWM period. (Refer to 14.3.3.2
Buffer Operation.)
Buffer register. Set the next PWM output change point. (Refer to
14.3.3.2 Buffer Operation.)
PWM Output Pin
−
TRCIOB
TRCIOC
TRCIOD
−
TRCIOB
j = A, B, C, or D
BFC, BFD: Bits in TRCMR register
NOTE:
1. The output level does not change even when a compare match occurs if the TRCGRA register value (PWM
period) is the same as the TRCGRB, TRCGRC, or TRCGRD register value.
Rev.2.10 Sep 26, 2008 Page 212 of 453
REJ09B0278-0210