R8C33A Datasheet, PDF (56/617 Pages) Renesas Technology Corp – MCU M16C FAMILY / R8C/Tiny SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change.
R8C/33A Group
5. Resets
5.1 Registers
5.1.1 Processor Mode Register 0 (PM0)
Address 0004h
Bit b7
b6
b5
b4
b3
b2
b1
b0
Symbol —
—
—
—
PM03
—
—
—
After Reset 0
0
0
0
0
0
0
0
Bit Symbol
Bit Name
Function
R/W
b0
— Reserved bits
Set to 0.
R/W
b1
—
b2
—
b3 PM03 Software reset bit
The MCU is reset when this bit is set to 1. When R/W
read, the content is 0.
b4
— Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b5
—
b6
—
b7
—
Set the PRC1 bit in the PRCR register to 1 (write enabled) before rewriting the PM0 register.
5.1.2 Reset Source Determination Register (RSTFR)
Address 000Bh
Bit b7
b6
b5
b4
b3
b2
b1
Symbol —
—
—
—
WDR SWR HWR
After Reset 0
X
X
X
0
0
X
b0
CWR
X
(Note 1)
Bit Symbol
Bit Name
Function
R/W
b0 CWR Cold start-up/warm start-up
0: Cold start-up
R/W
determine flag ^{(2, 3)}
1: Warm start-up
b1 HWR Hardware reset detect flag
0: Not detected
R
1: Detected
b2 SWR Software reset detect flag
0: Not detected
R
1: Detected
b3 WDR Watchdog timer reset detect flag 0: Not detected
R
1: Detected
b4
— Reserved bits
When read, the content is undefined.
R
b5
—
b6
—
b7
— Reserved bit
Set to 0.
R/W
Notes:
1. The CWR bit is set to 0 (cold start-up) after power-on or voltage monitor 0 reset. This bit remains unchanged at a
software reset, or watchdog timer reset.
2. If 1 is written to the CWR bit by a program, it is set to 1. (Writing 0 does not affect this bit.)
3. When the VW0C0 bit in the VW0C register is set to 0 (voltage monitor 0 reset disabled), the CWR bit value is
undefined.
REJ09B0455-0010 Rev.0.10 Feb 29, 2008
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