HD404654 Datasheet, PDF (52/111 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404654 Series
Watchdog on
flag (WDON)
System
reset signal
Watchdog timer
control logic
Timer C interrupt
flag (IFTC)
TOC
System ^øPER
clock
Timer output
control logic
Timer read register CU (TRCU)
Timer output
control
Timer read
register CL
(TRCL)
Clock
Timer counter C
(TCC)
Overflow
Selector
Prescaler S (PSS)
Timer write
register CU
(TWCU)
Free-running
/reload control
Timer write
register CL
(TWCL)
3
Timer mode
register C1
(TMC1)
3
Timer mode
register C2
(TMC2)
Figure 35 Block Diagram of Timer C
Timer C Operations:
• Free-running/reload timer operation: The free-running/reload operation, input clock source, and
prescaler division ratio are selected by timer mode register C1 (TMC1: $00D).
Timer C is initialized to the value set in timer write register C (TWCL: $00E, TWCU: $00F) by
software and incremented by one at each clock input. If an input clock is applied to timer C after it has
reached $FF, an overflow is generated. In this case, if the reload timer function is enabled, timer C is
initialized to its initial value set in timer write register C; if the free-running timer function is enabled,
the timer is initialized to $00 and then incremented again.
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