32182 Datasheet, PDF (500/755 Pages) Renesas Technology Corp – 32-BIT RISC SINGLE-CHIP MICROCOMPUTER M32R FAMILY / M32R/ECU SERIES

13
CAN MODULE
13.2 CAN Module Related Registers
CAN0 Single-Shot Interrupt Request Status Register (CAN0SSIST)
CAN1 Single-Shot Interrupt Request Status Register (CAN1SSIST)
<address: H’0080 1044>
<Address: H’0080 1444>
b0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 b15
SSIST0 SSIST1 SSIST2 SSIST3 SSIST4 SSIST5 SSIST6 SSIST7 SSIST8 SSIST9 SSIST10 SSIST11 SSIST12 SSIST13 SSIST14 SSIST15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
<After reset: H’0000>
b
Bit Name
Function
RW
0
SSIST0
Slot 0 single-shot interrupt request status
0: No arbitration-lost or transmit error
1: Arbitration-lost or transmit error occurred
R(Note 1)
1
SSIST1
Slot 1 single-shot interrupt request status
2
SSIST2
Slot 2 single-shot interrupt request status
3
SSIST3
Slot 3 single-shot interrupt request status
4
SSIST4
Slot 4 single-shot interrupt request status
5
SSIST5
Slot 5 single-shot interrupt request status
6
SSIST6
Slot 6 single-shot interrupt request status
7
SSIST7
Slot 7 single-shot interrupt request status
8
SSIST8
Slot 8 single-shot interrupt request status
9
SSIST9
Slot 9 single-shot interrupt request status
10
SSIST10
Slot 10 single-shot interrupt request status
11
SSIST11
Slot 11 single-shot interrupt request status
12
SSIST12
Slot 12 single-shot interrupt request status
13
SSIST13
Slot 13 single-shot interrupt request status
14
SSIST14
Slot 14 single-shot interrupt request status
15
SSIST15
Slot 15 single-shot interrupt request status
Note 1: Only writing "0" is effective. Writing "1" has no effect; the bit retains the status it had before the write.
If transmission in any slot failed for reasons of a detection of arbitration-lost or a transmit error, the correspond-
ing bit in this register is set to "1". The bit is cleared by writing "0" in software.
Furthermore, if the corresponding bit in the CAN single-shot interrupt request enable register has been set to "1",
an interrupt request can be generated when transmission failed.
When writing to the CAN single-shot interrupt request status, make sure only the bits to be cleared are set to "0"
and all other bits are set to "1". Those bits that have been set to "1" are unaffected by writing in software and
retain the value they had before the write.
13-33
32182 Group User’s Manual (Rev.1.0)