HAT2058R_09 Datasheet, PDF (5/8 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET High Speed Power Switching

HAT2058R
Preliminary
Reverse Drain Current vs.
Source to Drain Voltage
10
Pulse Test
8
6
10 V
4
5V
2
V_GS = 0, –5 V
Maximum Avalanche Energy vs.
Channel Temperature Derating
2.5
I_AP = 4 A
V_DD = 50 V
2.0
L = 100 μH
duty < 0.1 %
Rg ≥ 50 Ω
1.5
1.0
0.5
0
0 0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
10
D=1
1
0.5
0.2
0.1 _0.1
0.05
0.02
0.01 _0.01
0.001
1shot ^pulse
θch – f (t) = γ s (t) • θch – f
θch – f = 125°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
P_DM
D = ^PW
T
PW
T
0.0001
10 μ 100 μ 1 m
10 m 100 m 1
10
Pulse Width PW (S)
100 1000 10000
Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)
10
D=1
1
0.5
0.2
0.1 _0.1
0.05
0.02
0.01 _0.01
0.001
1shot ^pulse
0.0001
10 μ 100 μ 1 m
θch – f (t) = γ s (t) • θch – f
θch – f = 166°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
P_DM
D = ^PW
T
PW
T
10 m 100 m 1
10
Pulse Width PW (S)
100 1000 10000
REJ03G1174-0300 Rev.3.00 Aug 25, 2009
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