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HAF1010RJ_16 Datasheet, PDF (5/7 Pages) Renesas Technology Corp – Silicon P Channel MOS FET Series Power Switching
HAF1010RJ
Gate to Source Voltage vs.
Shutdown Time of Load-Short Test
-15
-10
VDD = -16 V
-24 V
-5
0
0.0001 0.001
0.01
0.1
Shutdown Time of Lord-Short Test
Pw (S)
Target Specifications
Shutdown Case Temperature vs.
Gate to Source Voltage
200
180
160
140
120
ID = –0.5 A
100
0
–2 –4 –6 –8 –10
Gate to Source Voltage VGS (V)
Normalized Transient Thermal Impedance vs. Pulse Width
10
1 D=1
0.5
0.2
0.1 0.1
0.05
0.02
0.01 0.01
0.001
1shot pulse
0.0001
10 μ 100 μ 1 m
θch − f(t) = γs (t) • θch − f
θch − f = 83.3°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
PDM
PW
T
D=
PW
T
10 m 100 m 1
10
Pulse Width PW (S)
100 1000 10000
R07DS1361EJ0200 Rev.2.00
Sep 06, 2016
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