R8C2C Datasheet, PDF (470/615 Pages) Renesas Technology Corp – MCU

R8C/2C Group, R8C/2D Group
16. Clock Synchronous Serial Interface
SCL
(master output)
9
1
2
3
4
5
6
7
8
9
1
SDA
(master output)
b7
b6
b5
b4
b3
b2
b1
b0
b7
SCL
(slave output)
SDA
(slave output)
A
RDRF bit in ¹
ICSR register
0
ICDRS register
Data 1
A
Data 2
ICDRR register
Data 1
Processing
by program
(2) Dummy read of ICDRR register
(2) Read ICDRR register
Figure 16.41 Operating Timing in Slave Receive Mode (I²C bus Interface Mode) (1)
SCL
(master output)
SDA
(master output)
SCL
(slave output)
9
1
2
3
4
5
6
7
8
9
b7
b6
b5
b4
b3
b2
b1
b0
SDA
(slave output)
A
RDRF bit in ¹
ICSR register
0
ICDRS register
Data 1
A
Data 2
ICDRR register
Data 1
Processing
by program
(3) Set ACKBT bit to 1
(3) Read ICDRR register
(4) Read ICDRR register
Figure 16.42 Operating Timing in Slave Receive Mode (I²C bus Interface Mode) (2)
Rev.2.00 Dec 05, 2007 Page 449 of 585
REJ09B0339-0200