R8C2C Datasheet, PDF (307/615 Pages) Renesas Technology Corp – MCU

R8C/2C Group, R8C/2D Group
14. Timers
Module Operation Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
MSTCR
Bit Symbol
Address
0008h
Bit Name
After Reset
00h
Function
RW
—
Nothing is assigned. If necessary, set to 0.
(b2-b0) When read, the content is 0.
—
SSU, I²C bus operation enable bit 0: Disable⁽¹⁾
MSTIIC
1: Enable
RW
Timer RD operation enable bit
0: Disable⁽²⁾
MSTTRD
1: Enable
RW
Timer RC operation enable bit
0: Disable⁽³⁾
MSTTRC
1: Enable
RW
—
Nothing is assigned. If necessary, set to 0.
(b7-b6) When read, the content is 0.
—
NOTES:
1. When the MSTIIC bit is set to 0 (disable), any access to the SSU or the I²C bus associated registers (addresses
00B8h to 00BFh) is disabled.
2. When the MSTTRD bit is set to 0 (disable), any access to the timer RD associated registers (addresses 0137h to
015Fh) is disabled.
3. When the MSTTRC bit is set to 0 (disable), any access to the timer RC associated registers (addresses 0120h to
0132h) is disabled.
Figure 14.101 MSTCR Register
Rev.2.00 Dec 05, 2007 Page 286 of 585
REJ09B0339-0200