M32C83 Datasheet, PDF (470/527 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/83 Group (M32C/83, M32C/83T)
26. Electrical Characteristics
Vcc=3.3V
Memory Expansion Mode and Microprocessor Mode
(with a wait state, when accessing an external memory and using the multiplexed bus)
Read Timing
BCLK
ALE
td(BCLK-ALE)
18ns.max
th(BCLK-ALE)
-2ns.min
td(BCLK-CS)
tcyc
18ns.max
CSi
td(AD-ALE)⁽¹⁾ th(ALE-AD)⁽¹⁾
th(RD-CS)⁽¹⁾
th(BCLK-CS)
0ns.min
ADi
/DBi
ADi
BHE
Address
td(BCLK-AD)
18ns.max
tdz(RD-AD)
8ns.max
tac3(RD-DB)⁽¹⁾
Data input
tsu(DB-BCLK)
30ns.min
Address
th(RD-DB)
0ns.min _th(BCLK-AD)
0ns.min
tac3(AD-DB)⁽¹⁾
td(BCLK-RD)
18ns.max
th(BCLK-RD)
-3ns.min
th(RD-AD)⁽¹⁾
RD
NOTES:
1. Varies with operation frequency.
td(AD-ALE)=(tcyc/2-20)ns.min
th(ALE-AD)=(tcyc/2-10)ns.min, th(RD-AD)=(tcyc/2-10)ns.min, th(RD-CS)=(tcyc/2-10)ns.min
tac3(RD-DB)=(tcyc/2 x m-35)ns.max (m=3 with 2 wait states and m=5 with 3 wait states)
tac3(AD-DB)=(tcyc/2 x n-35)ns.max (n=5 with 2 wait states and n=7 with 3 wait states)
Write Timing
BCLK
ALE
td(BCLK-ALE) _th(BCLK-ALE)
18ns.max
-2ns.min
td(BCLK-CS)
tcyc
18ns.max
CSi
th(WR-CS)⁽¹⁾
th(BCLK-CS)
0ns.min
td(AD-ALE)⁽¹⁾ _th(ALE-AD)(1)
ADi
/DBi
ADi
BHE
Address
td(BCLK-AD)
18ns.max
Data output
td(DB-WR)⁽¹⁾
th(WR-DB)⁽¹⁾
Address
th(BCLK-AD)
0ns.min
WR,WRL,
WRH
td(BCLK-WR)
18ns.max
NOTES:
1. Varies with operation frequency.
td(AD-ALE)=(tcyc/2-20)ns.min
th(ALE-AD)=(tcyc/2-10)ns.min, th(WR-AD)=(tcyc/2-10)ns.min
th(WR-CS)=(tcyc/2-10)ns.min, th(WR-DB)=(tcyc/2-10)ns.min
td(DB-WR)=(tcyc/2 x m-25)ns.min
(m=3 with 2 wait states and m=5 with 3 wait states)
th(BCLK-WR)
0ns.min
th(WR-AD)⁽⁾
Measurement Conditions:
• VCC=3.0 to 3.6V
• Input high and low voltage:
VIH=1.5V, VIL=0.5V
• Output high and low voltage:
VOH=1.5V, VOL=1.5V
Figure 26.12 VCC=3.3V Timing Diagram (3)
Rev. 1.31 Jan.31, 2006 Page 447 of 488
REJ09B0034-0131