M32C83 Datasheet, PDF (338/527 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/83 Group (M32C/83, M32C/83T)
21. Intelligent I/O (Group 2 Communication Function)
Table 21.37 Registers to be Used and Settings
Register
G2BCR0
G2BCR1
G2POCR0
to G2POCR7
G2PO0 to
G2PO7
G2FE
G2MR
G2CR
IECR
IEAR
IETIF
IERIF
G2RB
G2TB
Bit
BCK1 to BCK0
DIV4 to DIV0
IT
7 to 0
MOD2 to MOD0
PRT
IVL
RLD
RTP
INV
15 to 0
Function
Set to "112"
Select divide ratio of count source
Set to "0"
Set to "000100102"
Set to "1112"
Set to "0"
Set to "0"
Set to "0"
Set to "0"
Set to "0"
Set compared data for waveform generation
7 to 0
GMD1 to GMD0
CKDIR
UFORM
IRS
TI
TXEPT
RI
TE
RE
IPOL
OPOL
IEB
IETS
IEBBS
DF
IEM
11 to 0
IETNF
IEACK
IETMB
IETT
IEABL
IERNF
IEPAR
IERMB
IERT
IERETC
7 to 0
OER
7 to 0
Set bit of corresponding channel to "1"
Select serial I/O mode
Select internal clock or external clock
Select either LSB first or MSB first
Select how the transmit interrupt is generated
Transmit buffer empty flag
Transmit register empty flag
Receive complete flag
When transmission is enabled, set to "1"
When reception is enabled, set to "1"
ISRxD2 input polarity inverse (usually set to "0")
ISTxD2 output polarity inverse (usually set to "0")
Set to "1"
When transmission starts, set to "1"
Select IEBus busy flag
Select whether the digital filter is available or not
Select mode
Set address data
Normal complete flag when transmitting
ACK error flag when transmitting
Maximum transfer byte error flag when transmitting
Timing error flag when transmitting
Arbitration lost flag when transmitting
Normal complete flag when receiving
Parity error flag when receiving
Maximum transfer byte error flag when receiving
Timing error flag when receiving
Other cause receive completed flag when receiving
Received data and error flag are stored
Overrun error flag
Write transfer bit length and data to be transmitted
Rev. 1.31 Jan.31, 2006 ^{Page 315} of 488
REJ09B0034-0131