RJJ0601JPN Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Silicon P Channel MOS FET High Speed Power Switching

RJJ0601JPN
100000
10000
Typical Capacitance vs.
Drain to Source Voltage
V_GS = 0
f = 1 MHz
Ciss
1000
Coss
Crss
100
−0 −10 −20 −30 −40 −50
Drain to Source Voltage V_DS (V)
–100
Reverse Drain Current vs.
Source to Drain Voltage
Pulse Test
–10 V
–50
V_GS = 0 V
0
–0.4 –0.8 –1.2 –1.6 –2.0
Source to Drain Voltage V_SD (V)
Vin
–15 V
Avalanche Test Circuit
V_DS
Monitor
Rg
L
I_AP
Monitor
D. U. T
V_DD
50 Ω
Dynamic Input Characteristics
0
0
V_DD = –5 V
–10 V
–4
–25 V
–10
–8
V_DS
–12
V_DD = –25 V
–10 V
–5 V
–20
V_GS
–30
I_D = –90 A
–16
0
50
100
150
Gate Charge Qg (nC)
–40
200
Maximum Avalanche Energy vs.
Channel Temperature Derating
250
L = 100 µH
V_DD = –25 V
200
duty < 0.1 %
Rg ≥ 50 Ω
150
100
50
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Avalanche Waveform
E_AR =
1
2
L • I_AP2 •
V_DSS
V_DSS – V_DD
I_AP
I_D
V_(BR)DSS
V_DS
V_DD
0
REJ03G1602-0100 Rev.1.00 Nov 21, 2007
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