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NP36P04SDG_15 Datasheet, PDF (4/9 Pages) Renesas Technology Corp – SWITCHING P-CHANNEL POWER MOS FET | |||
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NP36P04SDG
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS
Gate Leakage Current
IGSS
Gate to Source Threshold Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
VGS(th)
| yfs |
RDS(on)1
RDS(on)2
Input Capacitance
Ciss
VDS = â40 V, VGS = 0 V
VGS = m20 V, VDS = 0 V
VDS = VGS, ID = â250 μA
VDS = â10 V, ID = â18 A
VGS = â10 V, ID = â18 A
VGS = â4.5 V, ID = â18 A
VDS = â10 V,
Output Capacitance
Coss
VGS = 0 V,
Reverse Transfer Capacitance
Turn-on Delay Time
Crss
td(on)
f = 1 MHz
VDD = â20 V, ID = â18 A,
Rise Time
tr
VGS = â10 V,
Turn-off Delay Time
td(off)
RG = 0 Ω
Fall Time
Total Gate Charge
tf
QG
VDD = â32 V,
Gate to Source Charge
QGS
VGS = â10 V,
Gate to Drain Charge
Body Diode Forward Voltage Note
Reverse Recovery Time
Reverse Recovery Charge
QGD
VF(S-D)
trr
Qrr
ID = â36 A
IF = â36 A, VGS = 0 V
IF = â36 A, VGS = 0 V,
di/dt = â100 A/μs
Note Pulsed test PW ⤠350 μs, Duty Cycle ⤠2%
MIN.
â1.0
12
TYP.
â1.6
23
12.5
15.4
2800
450
280
8
10
250
140
55
7
15
0.95
44
51
MAX.
â10
m100
â2.5
17.0
23.5
1.5
UNIT
μA
nA
V
S
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = â20 â 0 V
â
IAS BVDSS
VDS
ID
VDD
Starting Tch
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG
PG.
VGS(â)
0
Ï
Ï = 1 μs
Duty Cycle ⤠1%
RL
VDD
VGS(â)
VGS
Wave Form
0 10%
VDS(â)
90%
VDS
VDS
Wave Form 0
td(on)
VGS
90%
90%
10% 10%
tr td(off)
tf
ton
toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = â2 mA
RL
PG.
50 Ω
VDD
2
Data Sheet D19074EJ2V0DS
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