HD49338NP_15 Datasheet, PDF (4/25 Pages) Renesas Technology Corp – CDS/PGA & 12-bit A/D Converter

HD49338NP/HNP
Pin Arrangement
VRM
VRT
VRB
DV_DD
DV_SS
OEB
DV_DD
DV_DD
DV_SS
CS
SDATA
SCK
36 35 34 33 32 31 30 29 28 27 26 25
37
24
38
23
39
22
40
21
41
20
42
19
43
18
44
17
45
16
46
15
47
14
48
13
1 2 3 4 5 6 7 8 9 10 11 12
DV_DD
(NC)
SPSIG
SPBLK
OBP
PBLK
DV_DD
DV_DD
ADCLK
DV_SS
DV_SS
DRDV_DD
(Top view)
Pin Description
Pin No.
1
2 to 11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Symbol
D0
D1 to D10
D11
DRDVDD
DVSS
DVSS
ADCLK
DVDD
DVDD
PBLK
OBP
SPBLK
SPSIG
NC
DVDD
AVSS
AVSS
AVDD
BLKSH
BLKFB
CDSIN
BLKC
BIAS
Description
Digital output (LSB)
Digital output
Digital output (MSB)
Output buffer power supply (3 V)
Digital ground (0 V)
Digital ground (0 V)
ADC conversion clock input pin
Digital power supply (3 V)
Digital power supply (3 V)
Preblanking input pin
Optical black pulse input pin
Black level sampling clock input pin
Signal level sampling clock input pin
No connection pin
Output power supply (3 V)
Analog ground (0 V)
Analog ground (0 V)
Analog power supply (3 V)
Black level S/H pin
Black level FB pin
CDS input pin
Black level C pin
Internal bias pin
Connect a 33 kΩ resistor between BIAS and AVSS.
Analog(A) or
I/O
Digital(D)
O
D
O
D
O
D
—
D
—
D
—
D
I
D
—
D
—
D
I
D
I
D
I
D
I
D
—
—
—
D
—
A
—
A
—
A
—
A
—
A
I
A
—
A
—
A
Rev.2.00 May 20, 2005 page 2 of 22