H8S-2276 Datasheet, PDF (301/869 Pages) Renesas Technology Corp – Single-Chip Microcomputer

10.2.8 Timer Start Register (TSTR)
Bit
:
7
6
5
4
3
2
1
0
—
—
—
—
—
CST2 CST1 CST0
Initial value :
0
0
0
0
0
0
0
0
R/W
:
—
—
—
—
—
R/W
R/W
R/W
TSTR is an 8-bit readable/writable register that selects operation/stoppage for channels 0 to 2.
TSTR is initialized to H'00 by a reset, and in hardware standby mode.
TCNT counter operation must be halted before setting the operating mode in TMDR, or setting the
TCNT count clock in TCR.
Bits 7 to 3—Reserved: Should always be written with 0.
Bits 2 to 0—Counter Start 2 to 0 (CST2 to CST0): These bits select operation or stoppage for
TCNT.
Bit n
CSTn
Description
0
TCNTn count operation is stopped
(Initial value)
1
TCNTn performs count operation
Note:
n = 2 to 0
If 0 is written to the CST bit during operation with the TIOC pin designated for output, the
counter stops but the TIOC pin output compare output level is retained. If TIOR is written to
when the CST bit is cleared to 0, the pin output level will be changed to the set initial output
value.
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