H8S-2276 Datasheet, PDF (299/869 Pages) Renesas Technology Corp – Single-Chip Microcomputer

In channels 1 and 2, bit 2 is reserved. It is always read as 0 and cannot be modified.
Bit 2
TGFC
0
1
Description
[Clearing conditions]
(Initial value)
• When DTC is activated by TGIC interrupt while DISEL bit of MRB in DTC is 0
• When 0 is written to TGFC after reading TGFC = 1
[Setting conditions]
• When TCNT = TGRC while TGRC is functioning as output compare register
• When TCNT value is transferred to TGRC by input capture signal while TGRC is
functioning as input capture register
Bit 1—Input Capture/Output Compare Flag B (TGFB): Status flag that indicates the
occurrence of TGRB input capture (only for channel 0) or compare match.
Bit 1
TGFB
0
1
Description
[Clearing conditions]
(Initial value)
• When DTC is activated by TGIB interrupt while DISEL bit of MRB in DTC is 0
• When 0 is written to TGFB after reading TGFB = 1
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as output compare register
• When TCNT value is transferred to TGRB by input capture signal while TGRB is
functioning as input capture register (only for channel 0)
Bit 0—Input Capture/Output Compare Flag A (TGFA): Status flag that indicates the
occurrence of TGRA input capture or compare match.
Bit 0
TGFA
0
1
Description
[Clearing conditions]
(Initial value)
• When DTC is activated by TGIA interrupt while DISEL bit of MRB in DTC is 0
• When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning as output compare register
• When TCNT value is transferred to TGRA by input capture signal while TGRA is
functioning as input capture register
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