RJF0409JSP_15 Datasheet, PDF (3/8 Pages) Renesas Technology Corp – 40V, 5A Silicon N Channel Thermal FET Power Switching

RJF0409JSP
Main Characteristics
Power vs. Temperature Derating
4.0
Test condition.
When using the glass epoxy board.
3.0 ^{(FR4 40 x 40 x 1.6 mm), (PW ≤ 10s)}
2.0
1.0
1 _Driv2eDr ^rOivpeer _{rOaptieornation}
0
0
50
100
150
200
Ambient Temperature Ta (°C)
Typical Output Characteristics
20
6V
Pulse Test
8V
15
10 V
5V
4V
10
V_GS = 3.5 V
5
0
2
4
6
8 10
Drain to Source Voltage V_DS (V)
Drain Source Saturation Voltage vs.
Gate to Source Voltage
1000
Pulse Test
800
600
400
5A
200
2.5 A
I_D = 1 A
0
0
2
4
6
8
10
Gate to Source Voltage V_GS (V)
R07DS1228EJ0200 Rev.2.00
Dec 02, 2014
Preliminary
Maximum Safe Operation Area
100 _{Ta = 25°C}
1 shot Pulse
1 Driver Operation
Thermal shut down
operation area
10
PW
10 _ms
= _{1 ms}
1
10 _ms
0.1
Operation
in this area
is limited R_DS(on)
0.01
0.01
0.1
1
10
100
Drain to Source Voltage V_DS (V)
Note :When using the glass epoxy board.
(FR4 40 x 40 x 1.6 mm)
5
V_DS = 10 V
Pulse Test
4
150°C
3
25°C
2
1
T_C = −40°C
0
0
1
2
3
4
5
Gate to Source Voltage V_GS (V)
Static Drain to Source On State Resistance
vs. Drain Current
1000
Pulse Test
100
V_GS = 5 V
10 V
10
0.1
1
10
Drain Current I_D (A)
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