HD74LS107A Datasheet, PDF (3/7 Pages) Hitachi Semiconductor – Dual J-K Negative-edge-triggered Flip-Flops(with Clear)

HD74LS107A
Electrical Characteristics
(Ta = –20 to +75 °C)
Item
Symbol
min.
typ.* max.
Unit
Condition
Input voltage
Output voltage
J, K
V_IH
2.0
—
—
V
V_IL
—
—
0.8
V
V_OH
2.7
—
—
V
V_CC = 4.75 V, V_IH = 2 V, V_IL = 0.8 V,
I_OH = –400 µA
V_OL
—
—
—
0.5
—
0.4
V
I_OL = 8 mA
I_OL = 4 mA
V_CC = 4.75 V, V_IH = 2 V,
V_IL = 0.8 V
—
—
20
Clear
I_IH
—
—
60
µA V_CC = 5.25 V, V_I = 2.7 V
Clock
—
—
80
J, K
—
—
–0.4
Input
current
Clear
I_IL
—
—
–0.8
mA V_CC = 5.25 V, V_I = 0.4 V
Clock
—
—
–0.8
J, K
—
—
0.1
Clear
I_I
—
—
0.3
mA V_CC = 5.25 V, V_I = 7 V
Clock
—
—
0.4
Short-circuit output
current
I_OS
–20
—
–100
mA V_CC = 5.25 V
Supply current**
I_CC
—
4
6
mA V_CC = 5.25 V
Input clamp voltage
V_Ik
—
—
–1.5
V
V_CC = 4.75 V, I_IN = –18 mA
Notes: * V_CC = 5 V, Ta = 25°C
** With all outputs open, I_CC is measured with the Q and Q outputs high in turn. At the tires of measurement, the
clock input is grounded.
Switching Characteristics
Item
Maximum clock frequency
Propagation delay time
Symbol
f_max
t_PLH
t_PHL
Inputs
Clear
Clock
(V_CC = 5 V, Ta = 25°C)
Outputs min. typ. max. Unit
Condition
Q, Q
30
45
— MHz
—
15
20
ns
C_L = 15 pF,
R_L = 2 kΩ
—
15
20
ns
Timing Definition
t_w
Clock
J, K
1.3 V
t_su
1.3 V
t_h
1.3 V
"H" Data
1.3 V
3V
1.3 V
0V
t_su
t_h
3V
"L" Data
1.3 V
0V
Rev.3.00, Jul.13.2005, page 3 of 6