PD46185084B_15 Datasheet, PDF (28/39 Pages) Renesas Technology Corp – 18M-BIT QDRTM II SRAM 4-WORD BURST OPERATION

μPD46185084B, μPD46185094B, μPD46185184B, μPD46185364B
Scan Register Definition (1)
Register name
Description
Instruction register
Bypass register
ID register
Boundary register
The instruction register holds the instructions that are executed by the TAP controller
when it is moved into the run-test/idle or the various data register state. The register can
be loaded when it is placed between the TDI and TDO pins. The instruction register is
automatically preloaded with the IDCODE instruction at power-up whenever the controller
is placed in test-logic-reset state.
The bypass register is a single bit register that can be placed between TDI and TDO. It
allows serial test data to be passed through the RAMs TAP to another device in the scan
chain with as little delay as possible.
The ID Register is a 32 bit register that is loaded with a device and vendor specific 32 bit
code when the controller is put in capture-DR state with the IDCODE command loaded in
the instruction register. The register is then placed between the TDI and TDO pins when
the controller is moved into shift-DR state.
The boundary register, under the control of the TAP controller, is loaded with the contents
of the RAMs I/O ring when the controller is in capture-DR state and then is placed
between the TDI and TDO pins when the controller is moved to shift-DR state. Several
TAP instructions can be used to activate the boundary register.
The Scan Exit Order tables describe which device bump connects to each boundary
register location. The first column defines the bit’s position in the boundary register. The
second column is the name of the input or I/O at the bump and the third column is the
bump number.
Scan Register Definition (2)
Register name
Bit size
Unit
Instruction register
3
bit
Bypass register
1
bit
ID register
32
bit
Boundary register
107
bit
ID Register Definition
Part number Organization
μPD46185084B
μPD46185094B
μPD46185184B
μPD46185364B
2M x 8
2M x 9
1M x 18
512K x 36
ID [31:28] vendor
revision no.
XXXX
XXXX
XXXX
XXXX
ID [27:12] part no.
0000 0000 0000 1111
0000 0000 0101 0010
0000 0000 0001 0000
0000 0000 0001 0001
ID [11:1] vendor
ID no.
00000010000
00000010000
00000010000
00000010000
ID [0] fix bit
1
1
1
1
R10DS0113EJ0200 Rev.2.00
Nov 09, 2012
Page 28 of 38