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HD404618 Datasheet, PDF (28/91 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer
HD404618 Series
Reset
Standby mode
Active mode
f OSC :
f X:
ø CPU:
ø CLK :
ø PER:
Operating
Operating
Stopped
f cyc
f cyc
(TMA3 = 0)
SBY (standby)
Interrupt
Timers A, B, C,
Serial,
INT0, INT1
f OSC :
f X:
ø CPU:
ø CLK :
ø PER:
Operating
Operating
f cyc
f cyc
f cyc
STOP
Stop mode
(TMA3 = 0)
f OSC :
f X:
ø CPU:
ø CLK :
ø PER:
Stopped
Operating
Stopped
Stopped
Stopped
Watch mode
f OSC :
f X:
ø CPU:
ø CLK :
ø PER:
Operating
Operating
Stopped
f SUB
f cyc
(TMA3 = 1)
SBY (standby)
Interrupt
Timers A, B, C,
f OSC :
f X:
ø CPU:
ø CLK :
ø PER:
Operating
Operating
f cyc
f SUB
f cyc
Serial,
INT0, INT1
*2
STOP
INT0 ,
Timer
A*1
(TMA3 = 1, LSON = 0)
f OSC :
f X:
ø CPU:
ø CLK :
ø PER:
Stopped
Operating
Stopped
fSUB
Stopped
*3
f OSC: Main oscillation frequency
f X : Suboscillation frequency
for time-base
f cyc :
f SUB :
ø CPU :
ø CLK :
ø PER :
fOSC /4
fX /8
System clock
Clock for time-base
Clock for other
peripheral functions
LSON: Low speed on flag
DTON: Direct transfer on flag
Subactive mode
f OSC :
f X:
ø CPU:
ø CLK :
ø PER:
Stopped
Operating
f SUB
f SUB
f SUB
STOP
INT0 ,
Timer
A*1
STOP/SBY
(LSON = 1) *4
(TMA3 = 1, LSON = 1)
f OSC :
f X:
ø CPU:
ø CLK :
ø PER:
Stopped
Operating
Stopped
fSUB
Stopped
Notes: 1. Time-base interrupt
2. STOP/SBY (DTON = 1, LSON = 0)
3. STOP/SBY (DTON = 0, LSON = 0)
4. DTON is not affected
Figure 10 MCU Status Transitions
Table 17 I/O Status in Low-Power Dissipation Modes
D0–D9
D10–D 13
R0–R3
Output
Standby Mode, Watch Mode
Retained
—
Retained
Stop Mode
High impedance
—
High impedance
Input
Active Mode, Subactive Mode
Input enabled
Input enabled
Input enabled
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