PD78F0701Y_15 Datasheet, PDF (26/54 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCONTROLLER

(4) CPU resources
The CPU resources used for self-writing the flash memory are as follows:
• Register bank:
BANK3 (8 bytes)
B register:
Status flag
C register:
Function number
HL register:
Entry RAM area first address
• Stack area:
16 bytes MAX.
• Write data storage area: 1 to 256 bytes
• Entry RAM area:
32 bytes
RAM area used by self-writing subroutine.
Can be specified by user by using HL register.
• Status flag
7
6
Parameter
setting
-
error
5
4
3
2
1
0
-
Verify Write
-
Blank
check
-
error error
error
(5) Entry RAM area
Table 6-3 shows the contents of the entry RAM area.
Table 6-3. Entry RAM Area
Offset value
+0
+1
+2
+4
+6
+7
+8
+11
+14
+16
+17
+18
:
Contents
Reserved area (1 byte)
Reserved area (1 byte)
Flash memory start address (2 bytes)
Flash memory end address (2 bytes)
Number of bytes written to flash memory (1 byte)
Write time data (1 byte)
Erase time data (3 bytes)
Reserved area (3 bytes)
Write data storage buffer first address (2 bytes)
Total number of blocks (1 byte)
Total number of areas (1 byte)
Reserved area (14 bytes)
Example: When the value of the HL register in register bank 3 is 0FD00H
0FD00H: Status
0FD02H: Flash memory start address
0FD06H: Number of bytes written to flash memory
:
µPD78F0701Y
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Preliminary Product Information U13563EJ2V0PM00