7630_03 Datasheet, PDF (23/238 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The 7630 group uses the standard 740 family instruction set. Refer
to the table of 7600 series addressing modes and machine instruc-
tions or the 7600 series Software Manual for details on the instruc-
tion set.
Machine-resident 7600 series instructions are as follows:
The MUL, DIV, WIT and STP instruction can be used.
The central processing unit (CPU) has the six registers.
Accumulator (A)
The accumulator is an 8-bit register. Data operations such as data
transfer, etc., are executed mainly through the accumulator.
Index register X (X), Index register Y (Y)
Both index register X and index register Y are 8-bit registers. In the
index addressing modes, the value of the OPERAND is added to the
contents of register X or register Y and specifies the real address.
When the T flag in the processor status register is set to “1”, the
value contained in index register X becomes the address for the sec-
ond OPERAND.
HARDWARE
FUNCTIONAL DESCRIPTION
Stack pointer (S)
The stack pointer is an 8-bit register used during sub-routine calls
and interrupts. The stack is used to store the current address data
and processor status when branching to subroutines or interrupt rou-
tines.
The lower eight bits of the stack address are determined by the con-
tents of the stack pointer. The upper eight bits of the stack address
are determined by the Stack Page Selection Bit. If the Stack Page
Selection Bit is “0”, then the RAM in the zero page is used as the
stack area. If the Stack Page Selection Bit is “1”, then RAM in page 1
is used as the stack area.
The Stack Page Selection Bit is located in the SFR area in the zero
page. Note that the initial value of the Stack Page Selection Bit var-
ies with each microcomputer type. Also some microcomputer types
have no Stack Page Selection Bit and the upper eight bits of the
stack address are fixed. The operations of pushing register contents
onto the stack and popping them from the stack are shown in Fig.7.
Program counter (PC)
The program counter is a 16-bit counter consisting of two 8-bit regis-
ters PCH and PCL. It is used to indicate the address of the next in-
struction to be executed.
b15
PCH
b7
b0
A
Accumulator
b7
b0
X
Index Register X
b7
b0
Y
Index Register Y
b7
b0
S
Stack Pointer
b7
b0
PCL
Program Counter
b7
b0
N V T B D I Z C Processor Status Register (PS)
Carry Flag
Zero Flag
Interrupt Disable Flag
Decimal Mode Flag
Break Flag
Index X Mode Flag
Overflow Flag
Negative Flag
Fig. 5 740 Family CPU register structure
7630 Groop User’s Manual
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