7630_03 Datasheet, PDF (104/238 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

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2.4 Controller Area Network (CAN) module
CAN bus timing control register 2
b7 b6 b5 b4 b3 b2 b1 b0 _{CAN bus timing control register 2 (CBTCON2) [Address: 003216]}
B
Name
0
1
Phase buffer segment 1
duration control bits
2
3
4
Phase buffer segment 2
duration control bits
5
6
Synchronization jump width
control bits
7
Function
b2b1b0
000: One time quantum
001: Two time quanta
…
110: Seven time quanta
111: Eight time quanta
b5b4b3
000: One time quantum
001: Two time quanta
…
110: Seven time quanta
111: Eight time quanta
b7b6
00: One time quantum
01: Two time quanta
10: Three time quanta
11: Four time quanta
Note 1: Writing to this register is enabled in configuration mode only (refer to section 2.4.4).
Fig. 2.4.5 Structure of CAN bus timing control register 2 (CBTCON2)
At reset R W¹
0
OO
0
OO
0
OO
0
OO
0
OO
0
OO
0
OO
0
OO
CAN acceptance code register 0
b7 b6 b5 b4 b3 b2 b1 b0 _{CAN acceptance code register 0 (CAC0) [Address: 003316]}
B
Name
Function
0 Standard identifier bit 6
At reset R W¹
?
OO
1 Standard identifier bit 7
2 Standard identifier bit 8
3 Standard identifier bit 9
These bits (except when masked by the
?
acceptance mask register 0, Figure
2.4.11) form the acceptance filtering
condition for incoming CAN frames.
?
They must be initialized with the identifier
pattern of CAN frames to be received.
?
OO
OO
OO
4 Standard identifier bit 10
?
OO
5
?
OX
6 Not used
Undefined at read.
?
OX
7
Note 1: Writing to this register is enabled in configuration mode only (refer to section 2.4.4).
Fig. 2.4.6 Structure of CAN acceptance code register 0 (CAC0)
?
OX
2-38
7630 Group User’s Manual