7630_03 Datasheet, PDF (147/238 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.5 Serial I/O
• Transmitting side
CPU mode register [Address: 000016]
b7
b0
CPUM ₀
Internal system clock selection bit : φ = f(XIN) divided by 2
(high-speed mode)
UART mode register [Address: 002016]
b7
b0
UMOD 0 1 0 1 0 1
Clock divider selection bits : φ divided by 8
Stop bits selection bit : Two stop bits
Parity enable bit : Parity disabled
Word length selection bits : 8 bits
UART control register [Address: 002216]
b7
b0
UCON
0100
Transmit enable bit : Transmit disabled
(Set this bit to “1” at starting communication.)
Receive enable bit : Receive disabled
Transmission initialization bit : Initialize the transmit enable bit and
transmit status register flags.
Receive initialization bit : No action
UART baud rate generator [Address: 002116]
b7
b0
UBRG
3
Set
Transfer
bit
φ
rate
!
16
!
p^V
–
1
V The value p is decided by the Clock divider selection bits (bit 1 and bit 2
of the UART mode register [address: 002016]). Refer to Table 2.5.2.
UART status register [Address: 002316]
b7
b0
USTS
Transmission register empty flag :
This flag is set to “1” at transmit shift completed.
Check a completion of transmitting 1-word data with this flag.
Transmission buffer empty flag :
This flag is set to “1” at transfer data from the Transmit buffer
register to the Transmit shift register.
Check whether the next transmission data is writable to the
Transmit buffer register with this flag.
Fig. 2.5.20 Setting of related registers on transmitting side [Communication using UART]
7630 Group User’s Manual
2-81