H8S18 Datasheet, PDF (221/758 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 7 DMA Controller (DMAC)
Bit Bit Name Initial Value R/W Description
3 DTF3
0
2 DTF2
0
1 DTF1
0
0 DTF0
0
R/W Data Transfer Factor
R/W These bits select the data transfer factor (activation source).
R/W 0000: ⎯
R/W 0001: Activated by A/D conversion end interrupt
0010: ⎯
0011: ⎯
0100: Activated by SCI channel 0 transmission complete
interrupt
0101: Activated by SCI channel 0 reception complete
interrupt
0110: ⎯
0111: ⎯
1000: Activated by TPU channel 0 compare match/input
capture A interrupt
1001: Activated by TPU channel 1 compare match/input
capture A interrupt
1010: Activated by TPU channel 2 compare match/input
capture A interrupt
1011: ⎯
1100: ⎯
1101: ⎯
1110: ⎯
1111: ⎯
The same factor can be selected for more than one channel. In this case, activation starts with the
highest-priority channel according to the relative channel priorities. For relative channel priorities,
see section 7.4.10, DMAC Multi-Channel Operation.
Rev.7.00 Dec. 24, 2008 Page 165 of 698
REJ09B0074-0700