R8C-22_1 Datasheet, PDF (211/549 Pages) Renesas Technology Corp – MCU R8C FAMILY / R8C/2x SERIES

R8C/22 Group, R8C/23 Group
14. Timers
Timer RD General Register Ai, Bi, Ci and Di (i = 0 or 1)⁽¹⁾
(b15)
(b8)
b7
b0 b7
b0
Symbol
Address
After Reset
TRDGRA0
TRDGRB0
TRDGRC0
TRDGRD0
TRDGRA1
TRDGRB1
TRDGRC1
TRDGRD1
0149h-0148h
014Bh-014Ah
014Dh-014Ch
014Fh-014Eh
0159h-0158h
015Bh-015Ah
015Dh-015Ch
015Fh-015Eh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
Function
RW
Refer to Table 14.24 TRDGRji Register Functions in Input Capture Function
RW
NOTE:
1. Access the TRDGRAi to TRDGRDi registers in 16-bit units. Do not access them in 8-bit units.
Figure 14.44 Registers TRDGRAi, TRDGRBi, TRDGRCi and TRDGRDi in Input Capture Function
The following registers are disabled in the input capture function:
TRDOER1, TRDOER2, TRDOCR, TRDPOCR0 and TRDPOCR1
Table 14.24 TRDGRji Register Functions in Input Capture Function
Register
TRDGRAi
TRDGRBi
TRDGRCi
TRDGRDi
TRDGRCi
TRDGRDi
Setting
−
BFCi = 0
BFDi = 0
BFCi = 1
BFDi = 1
Register Function
Input-Capture Input Pin
General register
TRDIOAi
The value in the TRDi register can be read at the input
capture.
TRDIOBi
General register
TRDIOCi
The value in the TRDi register can be read at the input
capture.
TRDIODi
Buffer register
TRDIOAi
The value in the TRDi register can be read at the input
capture. (Refer to 14.3.2 Buffer Operation)
TRDIOBi
i = 0 or 1, j = either A, B, C or D
BFCi, BFDi: Bits in TRDMR Register
Set the pulse width of the input capture signal applied to the TRDIOji pin to 3 cycles or more of the Timer RD
operation clock (refer to Table 14.11 Timer RD Operation Clocks) for “no digital filter” (the DFj bit in the
TRDDFi register is set to 0).
Rev.2.00 Aug 20, 2008 Page 191 of 501
REJ09B0251-0200