HD49334ANP Datasheet, PDF (20/22 Pages) Renesas Technology Corp – CDS/PGA & 10-bit A/D Converter

HD49334ANP/AHNP
Example of Recommended External Circuit
• At CDS Input
R10 100
R11 100
R12 100
R13 100
R14 100
C11
0.1
C10
0.1
18 17 16 15 14 13 12 11 10
from
Timing generator
from CCD out
C14 0.1
C1
1µ
C3*² 1 µ
C4*¹
R15 33 k
C15 0.1
19 AV_DD
20 BLKSH
21 BLKFB
22 CDSIN
23 BLKC
24 BIAS
25 AV_DD
26 AV_SS
27 ADCIN
HD49334ANP/AHNP
(CDS/PGA+ADC)
D9 9
D8 8
D7 7
D6 6
D5 5
D4 4
D3 3
D2 2
D1 1
to
Camera
signal
processor
L2
28 29 30 31 32 33 34 35 36
47 µ
C16
47/6
L1
47 µ
3.0 V
C17 C18 C19 C22
0.1 0.1 0.1 0.1
C21
47/6
Serial data input
Notes: 1. For C4, see table 5.
2. For C3, see page 8 "DC Offset Compensation Feedback Function".
GND
• At ADC Input
C11
0.1
C10
0.1
from
Timing generator
18 17 16 15 14 13 12 11 10
C14 0.1
R15 33 k
C15 0.1
with ADC input
C2 2.2/16
19 AV_DD
20 BLKSH
21 BLKFB
22 CDSIN
23 BLKC
24 BIAS
25 AV_DD
26 AV_SS
27 ADCIN
HD49334ANP/AHNP
(CDS/PGA+ADC)
D9 9
D8 8
D7 7
D6 6
D5 5
D4 4
D3 3
D2 2
D1 1
to
Camera
signal
processor
28 29 30 31 32 33 34 35 36
C16
47/6
L1
47 µ
3.0 V
C17 C18 C19 C22
0.1 0.1 0.1 0.1
Note: External circuit is same as above except for ADC input.
L2
47 µ
C21
47/6
Serial data input
GND
Unit: R: Ω
C: F
Rev.2.00 May 20, 2005 page 20 of 21