HD74LV4040A Datasheet, PDF (2/11 Pages) Hitachi Semiconductor – 12-stage Binary Counter

HD74LV4040A
Pin Arrangement
Q₁₂ 1
Q₆ 2
Q₅ 3
Q₇ 4
Q₄ 5
Q₃ 6
Q₂ 7
GND 8
16 V_CC
15 Q₁₁
14 Q₁₀
13 Q₈
12 Q₉
11 CLR
10
9 Q₁
(Top view)
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage range
V_CC
Input voltage range*¹
V_I
Output voltage range*^{1, 2}
V_O
Input clamp current
Output clamp current
Continuous output current
Continuous current through
V_CC or GND
Maximum power dissipation at
Ta = 25°C (in still air)*³
I_IK
I_OK
I_O
I_CC or I_GND
P_T
–0.5 to 7.0
–0.5 to 7.0
–0.5 to V_CC + 0.5
–0.5 to 7.0
–20
±50
±25
±50
785
500
V
V
V
Output: H or L
V_CC: OFF
mA
V_I < 0
mA
V_O < 0 or V_O > V_CC
mA
V_O = 0 to V_CC
mA
mW
SOP
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.2.00 Jul. 20, 2004 page 2 of 10