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UPD78F9202MA-CAC-A Datasheet, PDF (191/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers
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CHAPTER 11 STANDBY FUNCTION
11.2 Standby Function Operation
11.2.1 HALT mode
(1) HALT mode
The HALT mode is set by executing the HALT instruction.
The operating statuses in the HALT mode are shown below.
Caution Because an interrupt request signal is used to clear the standby mode, if there is an interrupt
source with the interrupt request flag set and the interrupt mask flag clear, the standby mode
is immediately cleared if set.
Table 11-2. Operating Statuses in HALT Mode
Item
Setting of HALT Mode
Low-Speed Internal
Oscillator cannot be
stoppedNote 1.
Low-Speed Internal Oscillator can be stopped Note 1.
When Low-Speed Internal When Low-Speed Internal
Oscillation Continues
Oscillation Stops
System clock
Clock supply to CPU is stopped.
CPU
Operation stops.
Port (latch)
16-bit timer/event counter 00Note 2
8-bit timer
H1
Sets count clock to fXP to fXP/212
Sets count clock to fRL/27
Holds status before HALT mode was set.
Operable
Operable
Operable
Operable
Operation stops.
Watchdog “System clock” selected as
timer
operating clock
Setting disabled.
Operation stops.
“Low-speed internal oscillation
clock” selected as operating
clock
A/D converterNote 2
Operable
(Operation continues)
Operable
Operation stops.
Power-on-clear circuit
Always operates.
Low-voltage detector
Operable
External interrupt
Operable
Notes 1. “Cannot be stopped” or “Stopped by software” is selected for low-speed internal oscillator by the option byte
(for the option byte, see CHAPTER 15 OPTION BYTE).
2. μPD78F920x only
User’s Manual U18172EJ3V0UD
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