M306V7MG_15 Datasheet, PDF (113/300 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP
Table 2.11.3 Specifications of clock synchronous serial I/O mode (2)
Item
Specification
Select function
• CLK polarity selection
Whether transmit data is output/input at the rising edge or falling edge of the
transfer clock can be selected
• LSB first/MSB first selection
Whether transmission/reception begins with bit 0 or bit 7 can be selected
• Continuous receive mode selection
Reception is enabled simultaneously by a read from the receive buffer register
• Switching serial data logic (UART2)
Whether to reverse data in writing to the transmission buffer register or
reading the reception buffer register can be selected.
• TxD, RxD I/O polarity reverse (UART2)
This function is reversing TxD port output and RxD port input. All I/O data
level is reversed.
Notes 1: “n” denotes the value 0016 to FF16 that is set to the UART bit rate generator.
2: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also
that the UARTi receive interrupt request bit is not set to “1”.
Rev.1.00 May 18, 2004 page 111 of 296