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R1EX25002ASA00A Datasheet, PDF (11/22 Pages) Renesas Technology Corp – Serial Peripheral Interface Electrically Erasable and Programmable Read Only Memory
R1EX25002Axx00A/R1EX25004Axx00A
Write Disable (WRDI):
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown
in the following figure, to send this instruction to the device, chip select (S) is driven low, and the bits of the instruction
byte are shifted in, on serial data input (D).
The device then enters a wait state. It waits for the device to be deselected, by chip select (S) being driven high. The
Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
 Power-up
 WRDI instruction execution
 WRSR instruction completion
 WRITE instruction completion
 WRITE protect (W) is driven low
Write Disable (WRDI) Sequence
VIH
S
VIL
VIH
W
VIL
VIH
C
VIL
VIH
D
VIL
0 1 2 345 6 7
Instruction
Q
High-Z
REJ03C0357-0001 Rev. 0.01 Jan.25.2008
page 11 of 20