H8S2456 Datasheet, PDF (1065/1376 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series

Section 18 A/D Converter
ADIE
ADST
Set*
Set*
A/D conversion start
ADF
Clear*
Set*
Clear*
Channel 0 (AN0)
operation state
Channel 1 (AN1)
operation state
Waiting for conversion
Waiting for
conversion
A/D conversion 1
Channel 2 (AN2)
operation state
Waiting for conversion
Channel 3 (AN3)
operation state
Waiting for conversion
ADDRA
ADDRB
ADDRC
Waiting for conversion A/D conversion 2
Waiting for conversion
Reading A/D conversion result
A/D conversion result 1
Reading A/D conversion result
A/D conversion result 2
ADDRD
Note: * ↓ indicates the timing of instruction execution by software.
Figure 18.3 Example of A/D Converter Operation (Single Mode, Channel 1 Selected)
Rev. 1.00 Sep. 19, 2008 Page 1035 of 1342
REJ09B0467-0100