HN58X2402SFPIAG Datasheet, PDF (10/18 Pages) Renesas Technology Corp – Two-wire serial interface 2k EEPROM (256-word × 8-bit) 4k EEPROM (512-word × 8-bit)

HN58X2402SFPIAG/HN58X2404SFPIAG
Device Addressing
The EEPROM device requires an 8-bit device address word following a start condition to enable the chip for a read or a
write operation. The device address word consists of 4-bit device code, 3-bit device address code and 1-bit
read/write(R/W) code. The most significant 4-bit of the device address word are used to distinguish device type and
this EEPROM uses “1010” fixed code. The device address word is followed by the 3-bit device address code in the
order of A2, A1, A0. The device address code selects one device out of all devices which are connected to the bus.
This means that the device is selected if the inputted 3-bit device address code is equal to the corresponding hard-wired
A2-A0 pin status. As for the 4kbit EEPROMs, some bits of their device address code may be used as the memory
address bits. For example, A0 is used as a8 of memory address for the 4kbit. The eighth bit of the device address word
is the read/write(R/W) bit. A write operation is initiated if this bit is low and a read operation is initiated if this bit is
high. Upon a compare of the device address word, the EEPROM enters the read or write operation after outputting the
zero as an acknowledge. The EEPROM turns to a stand-by state if the device code is not “1010” or device address
code doesn’t coincide with status of the correspond hard-wired device address pins A0 to A2.
Device Address Word
Device code (fixed)
Device address word (8-bit)
Device address code*¹
2k
1
0
1
0
A2
A1
A0
4k
1
0
1
0
A2
A1
a8
Notes: 1. A2 to A0 are device address and a8 are memory address.
2. R/W=“1” is read and R/W = “0” is write.
R/W code*²
R/W
R/W
Rev.4.00, Jul.13.2005, page 10 of 16